1. Field of the Invention
This invention is directed to a memory system, in general, and to a common or shared memory with a unique addressing system, in particular.
2. Prior Art
There are many known memory systems available in the art today, especially in the electronic data processing or information handling systems. The memories can take many forms. Memories can be semi-conductor devices or any number of other technologies.
The number of electronic systems which use memories is also large. The methods wherein the systems utilize or address the memories is substantial. One type of system architecture is described in the copending application of Harvey Wallace and Eugene Lew, titled HIGH SPEED BUS ARCHITECTURE, filed on July 21, 1982, and bearing U.S. Ser. No. 400,493 (now U.S. Pat. No. 4,494,192 issued Jan. 15, 1985) assigned to the common assignee and incorporated herein in its entirety by reference. This prior art system includes a memory which is, effectively, segmented to supply (or store) information from a plurality of users. Thus, a segment is provided in the memory for each of the users and is identified therewith. The memory will interact with one or more users under control of the system as described in the aforesaid patent application of Wallace, et al.